trace32 Hisilicon Hi3516c cmm sample

- 1月 16, 2015

利用 trace32 將 uboot 載到 ram 上，執行。

下面是注意事項：

1. 建議在 flash 是空的狀況下，使用。

2. 如果有 code，請不要 run linux image，會無法使用。

3. 其他連不到的情況，請自行排除。

https://drive.google.com/file/d/0B9XTtNLiONrfQUZFdXZkX0hqZlU/view?usp=sharing

SYS.RESET

system.cpu ARM926EJ

sys.option noircheck on

sys.option MULTIPLESFIX on

;system.JTAGCLOCK 5MHz

system.JTAGCLOCK 1MHz

system.up

winclear

winpos 0% 0% 50% 50%

Data.List

area.res

area.c select 999

area.s select

winpos 50% 50% 50% 50%

w.area select

print "Start init System Reg:"

print "config PLL timeout. 4096*24M=171us"

; config PLL timeout. 4096*24M=171us

d.s 0x2011001c %LONG 0x80000600 ;

; config APLL

d.s 0x20030000 %LONG 0x11000000 ;

d.s 0x20030004 %LONG 0x0068306E ;

; config VPLL

d.s 0x20030008 %LONG 0x12000000 ;

d.s 0x2003000c %LONG 0x007C2063 ;

; config BPLL

;d.s 0x20030010 %LONG 0x19000000 ;

;d.s 0x20030014 %LONG 0x00682064 ;

d.s 0x20030010 %LONG 0x11000000 ;

;d.s 0x20030014 %LONG 0x0068306E ;

; config EPLL

d.s 0x20030020 %LONG 0x1B000000 ;

d.s 0x20030024 %LONG 0x007C40E1 ;

; config ARM9 DFS

d.s 0x20030028 %LONG 0x00000010 ;

print "waiting APPL/BPLL/VPLL/EPLL Locked"

; read 0x200300e8 == 0xf, APPL/BPLL/VPLL/EPLL Locked

while Data.Long(D:0x200300e8)!=0xf

(

; PRINT Data.Long(D:0x200300e8)

; wait 10ms

; print "wait 10ms 0x200300e8 ..."

)

;PRINT Data.Long(D:0x200300e8)

;config nand timing

print "config nand timing ..."

d.s 0x10000004 %LONG 0xaaa ;

; change to normal mode

print "change to normal mode ..."

d.s 0x20050000 %LONG 0x214 ;

print "waiting normal mode"

; if 0x20050000 == 0x224, mode == normal

while Data.Long(D:0x20050000)!=0x224

(

; PRINT Data.Long(D:0x20050000)

; wait 1s

; print "wait 1s 0x20050000 ..."

)

;PRINT Data.Long(D:0x20050000)

; waiting ...

wait 1s

; config DDRC configuration reg0

; [31:28]init_arefnum=0x8˙[27:20]:pd_prd=0x0˙[16]:pd_en=0x0˙

; [13:12]rank=0x0˙[10:8]dram_type=0x6˙[5:4]:mem_width=0x0˙[0]:brstlen=0x0

print "config DDRC configuration reg0 ..."

d.s 0x2011001c %LONG 0x80000600 ;

; config DDRC configuration reg1

; [22]sref_zqc_en=0x0˙[10]auto_pre_en=0x1˙[9]wr_rcv_mode=0x1˙[8]exclu_en=0x1˙

; [7]lock_en=0x1˙[5]wrlvl_en=0x0˙[4]dual_ch=0x0˙

; [3]read_mode=0x0˙ [2]clkratio=0x1˙[1]ecc_en=0x0˙[0]zqc_en=0x1

print "config DDRC configuration reg1 ..."

d.s 0x20110020 %LONG 0x785 ;

; config ddrc_timing2,disable auto refresh.

; [31:28]tcke(8bit)=0x3˙[27:24]twtr=0x2˙[23:20]twr=0x4˙[17:12]tfaw(8bit)=0x0a˙[10:0]taref(12bit)=0x0,disable auto refresh

print "config ddrc_timing2,disable auto refresh"

d.s 0x20110058 %LONG 0x32409000 ;

; exit ddr3 reset

print "exit ddr3 reset "

d.s 0x20110010 %LONG 0x1 ;

; config DDRC rank configuration reg

; DDR3 128M16, [13:12]mem_map=0x0ㄛRBC˙[8]mem_bank=0x18 bank˙[6:4]mem_row=0x2,13 row˙[2:0]mem_col=0x2,10 col

print "config DDRC rank configuration reg"

d.s 0x2011002c %LONG 0x122 ;

; config DDR memory base address

print "config DDR memory base address"

d.s 0x20110040 %LONG 0x80000000 ;

; config DDRC Timing Parameters

; ddrc_timing0

; [31:28]tmrd=0x6˙ [27:24]trrd=0x2˙[23:20]trp=0x3˙[19:16]trcd=0x3˙[13:8]trc(8bit)=0xa˙ [4:0]tras(8bit)=0x7

print "config DDRC Timing Parameters"

d.s 0x20110050 %LONG 0x62330a08 ;

; ddrc_timing1

; [31:24]tsre(8bit)=0xffis equal to tXSDLL˙[23:20]trdlat=0x6not use˙[19:16]trtw=0x2˙

; [15:12]twl=0x6˙[11:8]tcl=0x7˙[7:0]trfc(8bit)=0x20 or 0d32

print "ddrc_timing1"

d.s 0x20110054 %LONG 0xff626721 ;

; ddrc_timing3

; [31:22]tzq_prd=0x3ff˙[21:12]tzqinit=0xff˙[11:8]taond=0x5=twl-1˙[7:4]txard=0xf˙[3:0]trtp=0x2

print "ddrc_timing3"

d.s 0x2011005c %LONG 0xffcff5f2 ;

; config DDRC train mode

; train_rank=0x0, rensel=0x0, train_mode=0x0

print "config DDRC train mode"

d.s 0x201100ac %LONG 0x3000001 ;

; config DDRC ODT

print "config DDRC ODT "

d.s 0x201100f4 %LONG 0x1 ;

; exit self-refresh, and enter normal mode

print "exit self-refresh, and enter normal mode"

d.s 0x20110004 %LONG 0x0 ;

; wait until 0x20110000 DDRC_STATUS[in_sr]=1'b0

while Data.Long(D:0x20110000)!=0x0

(

PRINT Data.Long(D:0x20110000)

wait 1ms

print "wait 1ms 0x20110000 ..."

)

;PRINT Data.Long(D:0x20110000)

; Start DDRPHY Bypass initialization

; [31][initbyp]=1

print "Start DDRPHY Bypass initialization"

d.s 0x20120404 %LONG 0x80000000 ;

wait 1s

; wait until [idone] HIGHT˙as is Bypass initialization finished, when reading PGSR[idone]= 0x1addr.:0x2012040c)

;d.dump 0x0

; config DDRC PHY setting

print "config DDRC PHY setting"

; PGSR:

; [24]:pddisdx=0x1˙[23:22]:zcksel=0x2˙[21:18]ranken=0x1˙[2]DFTCMP=0x0˙[1]dqscfg=0x0:active windowing mode

d.s 0x2012040C %LONG 0x1 ;

; PGCR:

; [24]:pddisdx=0x1˙[23:22]:zcksel=0x2˙[21:18]ranken=0x1˙[2]DFTCMP=0x0˙[1]dqscfg=0x0:active windowing mode

d.s 0x20120408 %LONG 0x01842202 ;

; PTR0:

; [5:0],tDLLSRST=50ns;[17:6],tDLLLOCK=5.12us;[21:18],tITMSRST=8 clk2x period.

d.s 0x20120418 %LONG 0x220055 ;

; PTR1:

; [18:0],tDINIT0=500us;[26:19],tDINIT0=max(tRFC+10ns,5 clk2x period).

d.s 0x2012041c %LONG 0x48b0d41 ;

; PTR2:

; [16:0],tDINIT0=200us;[26:17],tDINIT0=1us.

d.s 0x20120420 %LONG 0x3233881 ;

; DSGCR:

; [0]puren=0x0

d.s 0x2012042c %LONG 0xf200001e ;

; DTPR0:

; [31]:tCCD=0x0˙[30:25]tRC=0x14˙[24:21]tRRD=0x4˙[20:16]tRAS=0xf

; [15:12]tRCD=0x6˙[11:8]tRP=0x6˙[7:5]tWTR=0x4˙[4:2]:tRTP=0x4˙[1:0]tMRD=0x3.

d.s 0x20120434 %LONG 0x288f6693 ;

; DTPR1:

; [29:27]tDQSCKmax=0x(only for LPDDR2),not use˙[26:24]tDQSCK=0(only for LPDDR2), not use˙

; [23:16]tRFC=0x40 or 64,is equal to tRFC˙

; [11]tRTODT=0˙[10:9]tMOD=0x0˙[8:3]tFAW=0x13 or 19˙

; [2]tRTW=0x0,add 1 clock to standard bus turn aroud delay˙[1:0]tAOND/tAOFD=0x3˙

d.s 0x20120438 %LONG 0x0041008b ;

; DTPR2:

; [28:19]tDLLK=0x200 or 512˙[18:15]tCKE=0x3˙

; [14:10]tXP=0xa˙[9:0]tXS=0x200 ,or 512˙

d.s 0x2012043c %LONG 0x1001aa00 ;

; DDRC_PUB_ZQNCR1

; [7:4]zprog.odt=0x6

; [3:0]zprog.drv=0xd:34

d.s 0x20120584 %LONG 0x6d ;

; MR0:

; [12]:PD=0x1,fast exit˙[11:9]:WR=0x3, 6 CK period˙[8]:DR=0x1;

; [6:4,2]:CL=0x6:tcl=7 CK period.

d.s 0x20120440 %LONG 0x1730 ;

; MR1:

; [9,6,2]:Rtt_nom=0x1ㄛ60 Ohm˙[5,1]:ODIC=0x1,34 Ohm.

d.s 0x20120444 %LONG 0x6 ;

; MR2:

; [5:3]: CWL=0x0:twl=6﹝

d.s 0x20120448 %LONG 0x8 ;

; DX0GCR:

; [12:11]:RTTOH=0x1˙[10]DQRTT=0x1˙[9]DQSRTT=0x1˙

; [8:7]DSEN=0x1˙[0]DXEN=0x1

d.s 0x201205c0 %LONG 0xe81 ;

; DX1GCR:

d.s 0x20120600 %LONG 0xe81 ;

; Start DDRPHY normal initialization

print "cStart DDRPHY normal initialization"

; [7:0][qstrn]=1[draminit]=1[dramrst]=1[itmsrst]=1[zcal]=1[dlllock]=1[dllsrst]=1,[init]=1

d.s 0x20120404 %LONG 0xff ;

d.s 0x2012040C %LONG 0x1 ;

// initialization finished, when reading 0x2012040c PGSR[idone]= 0x1;

// period=5.000000, period_ddr=2.500000

; ddrc_timing2:

print "ddrc_timing2"

; [10:0]taref(12bit)=0x62,enable auto refresh

d.s 0x20110058 %LONG 0x32409062 ;

d.s 0x20120408 %LONG 0x01842200 ;

;print "Initian finaish sleep 5 sec"

wait 5s

print "Initian finaish done ..."

; set program counter at program start

winpos 0% 50% 50% 50%

;Data.Dunp

data.dump 0x80000000 /long

;D.LOAD x:\J-220MHZ.bin 80000000 /LONG

;go 80000000

;enddo

留言

CP92015年2月10日凌晨12:58
你好,我們目前也在調HI3516C,目前開板不是很順利,主要是DDR部分跑不起來,量測CLK最高也只到24Mhz,所以懷疑可能是PLL沒有起來,剛好看到你的文章,因為目前手上只有Jlink ,請問一下 cmm 檔案,Jlink可以載入嗎?或是有什麼軟體可以轉換可以給jlink跑謝謝
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